Low-Cost Unified Pixel Converter from the MIPI DSI Packets into Arbitrary Pixel Sizes

The advance in semiconductors and image processing technologies has significantly improved visual quality, especially on mobile consumer devices. devices require a low-cost high-bandwidth interface to support various pixel formats high-resolution displays; thus, the MIPI Alliance proposed industry-standard DSI (Display Serial Interface). traditional implementation of Rx classified an incoming packet into three components, header, payload, checksum, by aligning with PHY input width then converting payload pixels. Its two-step approach resulted high costs for supporting This paper proposes unified converter, classifying each component only one step, thus achieving less area lower power consumption overhead. Two terms are newly introduced proposal: base remainder. size is same as input, remainder rest after bases aligned. one-pixel equals sum or more introduction allows us implement converter very straightforwardly due exact D-PHY input. Additionally, our does not considering header separately from since size. Therefore, detection unit eliminated, reducing complexity further. design was functionally verified FPGA synthesized through Samsung 65 nm standard cell library. synthesis result showed that reduced 25.7% 38.6% design.